Calibration Techniques In Nyquist A/D Converters
Nonuniform sampling using level-crossing method is shown in Figure 1. In this type of converter, the time difference between irregular samples should be quantized and transmitted. By reducing the value of Tc, the SNR of the reconstructed signal can be improved. There are many methods to reconstruct the original signal from nonuniform samples.
Reconstruction can be performed by using the TVa method , the lagrange method  and the CFTb method . Suppose that tk, keZ are increasing time instants of a irregular samples. The iterative method is used in order to recover the original signal x t from its nonuniform samples, xs t . The block diagram of an iterative algorithm is shown in Figure 2.
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In this scheme, G is a distortion operator it is known from the modulator and demodulator that caused the distortion in the input signal. The iterative algorithm is given by. However, x0 t — G x t is a good choice to achieve faster convergence.
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In general, G can be either a linear or nonlinear operator. It is simple to express xk t as. In order to obtain a good performance, A and B must be chosen properly they have to be selected by numerically.
Also, 1n can be determined as follows:. In our problem concerning the signal from nonuniform samples, distortion operator of G is a interpolator and a low-pass filter. Nonuniform samples pass from an interpolator in order to uniform, and then, a low-pass filter is used to remove the high frequency of the output of the interpolator. The SNR of reconstructed signal is dependent on the order of low-pass filter.
The convergence rate of the iterative method can be increased by using the Chebyshev acceleration CA algorithm. The block diagram of this method is shown in Figure 3. The convergence rate of the conventional iterative method is low even for the optimum parameter. By using the CA method, we can improve the iteration algorithm with relatively little additional complexity. The acceleration method can be stated as. In the case of synchronous SDM converters, distortion operator G comprise of a sigma-delta modulator and a low-pass filter LPF to remove the shaped quantization noise.
The block diagram of operator G for a first-order sigma-delta modulator is shown in Figure 4. The number of reference levels depends on the dynamic range of the continuous input signal. In delta level-crossing converters, difference between the input signal and the output of the converter is passed from a level-crossing sampler. In this case, the dynamic range of the input of the level-crossing sampler and, consequently, the number of. Therefore, the number of bits that are allocated to the amplitude of the input signal is reduced.
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The amplitude and time of each converted sample should be considered for digital transmission. The time difference between two consecutive samples is quantized instead of the time of each sample in order to prevent quantization error. In asynchronous DMs, the dynamic range of the input signal should be known in order to specify the number of reference levels and determine the interval between them.
The modulator of asynchronous DMs is shown in Figure 5a. Reconstruction of the original signal from the output of the modulator is depicted in Figure 5b. The integrator assumes that irregular samples are uniform, and then, integration is performed. Subsequently, the output integrator, which is a set of nonuniform samples, is passed from the interpolator, and uniform samples are achieved. The approximation of the original input signal is obtained by applying a low-pass filter to the output of interpolators in order to suppress the high-frequency components of the interpolated signal.
A decimator is used at the final stage to reduce the sampling rate to the Nyquist rate. Suppose that St is the error of time quantization. Then, the amplitude error of reconstructed signal will be SV, which can be derived from the input signal and St  with the following: equation.
In Equation 12 , V1 is the input of the level-crossing sampler, which is obtained from a delta modulation dVi. In each time instant, V1 is the input analog signal Vin subtracted from a previously selected reference level. It can be understood from above equation that, by decreasing the value of Tc and increasing the precision of the time quantizer, the SNR of reconstructed signal will be increased. In asynchronous converters, the oversampling ratio is not an integer number and depends on the statistical characteristics of the input signal.
The SNR of the reconstructed signal versus the precision of the time. In this figure, N is the number of bits for the amplitude quantizer it specifies the interval between reference levels. It can be seen in this figure that, for a specific OSR, the SNR of the reconstructed signal is increased by increasing the frequency of the. The same results e. On the other hand, by using the delta level-crossing, the number of reference levels is decreased to 7 bits , 25 5 bits and 7 3 bits.
The number of bits that are needed to encode the difference time of between sam-. Table 1. As expected, by increasing the sampling rate, the distance of between the samples is decreased and it causes a reduction in the number of reference levels bits that are needed for amplitude quantizer. The iterative algorithm is used in order to improve the performance of delta level-crossing converter.
The distortion operator G consists of the modulator and demodulator of the delta level-crossing converter, excluding the decimator module in the demodulator. In this method, the optimal l is obtained in way that the SNR in its saturate value after 10 iterations will be maximum. SNR versus the iteration number for three different timer resolutions is illustrated in Figure 7.
It can be comprehended from this figure that for a specific timer resolution, the SNR of the reconstructed signal cannot be enhanced by increasing the number of iterations after a certain threshold. Hence, in order to improve the SNR of the reconstructed signal, the precision of time quantizer should be increased. The asynchronous sigma-delta modulator can be implemented without any clock and can operate at low supply power because of its asynchronous design and simple corresponding circuitry. However, there is a large number of coarsely quantized samples.
By combining the SDM with the level-crossing scheme, the number of converted samples is decreased and a high dynamic range is obtained. The modulator of this converter consists of an integrator and a level-crossing sampler in a negative feedback loop.
As can be seen in Figure 8b, an interpolation stage converts nonuniform samples from the level-. Then, a decimator is used in order to reconstruct the original signal from interpolated samples in Nyquist rate. In a simple model for the asynchronous sigma-delta modulator, the error of level-crossing sampler is considered as an additive noise. Therefore, it can be realized that the error signal passes from a high-pass transfer function to receive in the output of the modulator and it causes noise shaping, which can improve performance of the system.
The SNR of the reconstructed signal versus the precision of the time quantizer — J for different over sam-. Similarly to Table 1, the number of bits that are needed to encode the difference time between samples for different timer resolutions — J is shown in Table 2. A comparison between. Table 1 and Table 2 shows that maximum distance between samples in asynchronous SDMs is smaller than those in asynchronous DMs and it leads to a smaller number of bits for the time quantizer. The SNR versus the iteration number for three different timer resolutions is illustrated in Figure The total power consumption of the converter after a specific number of iterations N can be obtained easily by multiplying the power of the one iteration by N.
Dynamic power consumption is related to switch transitions and operating frequency of the circuit, while. Dynamic power consumption for our asynchronous converter can be obtained from the following equation:. Where, CLoad and C[oad are approximately in the range of Picofarad and Femtofarad, respectively.
The right term of the above equation is the power, which is consumed by the timer clock. By comparing the operating frequency of the circuit in the synchronous and asynchronous converter with each other, it can be understand that asynchronous circuits are very effective converters in order to reduce dynamic power consumption.
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A first-order asynchronous sigma-delta modulator is used in our simulation. Therefore, we compare its results with a first-order synchronous sigma-delta modulator. The number of quantization level for synchronous converters is considered equal to the number of reference levels in asynchronous one. The simulation results can be observed in Table 3. It can be found from this table that good enhancement in the converter can be achieved by using the level-crossing sampler instead of the amplitude quantizer in a sigma-delta converter.
On the other hand, the complexity simulation time T in an asynchronous converter is greater than that of an synchronous one. Also, it can be seen that, by increasing the timer resolution, the SNR of the reconstructed signal is increased and the SNR in the case that.
As the effect of the mismatches is corrected, the power of the resulting IL spurs decreases. Compensation approaches are limited by the accuracy with which the mismatches can be measured and ultimately corrected. To further suppress the residual spurs beyond the level achieved via calibration, it is possible to intermittently and randomly shuffle the order with which the channels sample the input. In doing so, the previously discussed modulation effects of the converted input signal due to the uncalibrated mismatches turn from a fixed pattern noise to pseudorandom.
As a result, IL tones and undesired periodic patterns turn into pseudorandom noise-like content that adds with the converter quantization noise floor and leads to the disappearance or, at least, to spreading of the undesired spurious images and tones. In this case, the power associated with the IL spurious content adds to the power of the noise floor. Hence, while distortion improves, SNR can degrade by the amount of IL spurious power added to the noise.
Let us consider some examples of interleaved ADCs. The mismatches between the three channels are calibrated in order to minimize the interleaving spurs. An example of its output spectrum with an input close to 1 GHz is depicted in Figure 5 a. The interleaving mismatch calibration substantially minimizes the power of the interleaving spurs and a large set of additional residual small spurious tones is visible across the entire spectrum.
In order to further reduce such residual spurious content, channel randomization is introduced.
A fourth calibrated channel is added and the four channels are then three-way interleaved in randomly changing order by intermittently swapping one of the interleaved channels with the fourth one. One can liken that to a juggler playing with three Skittles up in the air while a fourth one is swapped in every so often. By doing so, the residual interleaving spurious power is randomized and spread out over the noise floor. As shown in Figure 5 b , after channel randomization, the interleaving spurs have nearly disappeared, while the power of the noise has marginally increased, hence degrading the SNR by 2 dB.
Another example of an interleaved ADC using channel randomization is the one shown in the spectra of Figure 6. In the case shown in Figure 6 the four channels are sequentially interleaved in a fixed sequence while no effort is made to calibrate them to reduce channel mismatch. The spectrum shows clearly the interleaving spurs at the predicted frequency locations and their large power is far greater than the 2 nd and 3 rd harmonics and limits the spurious-free dynamic range to only 57 dBc.
However, if the same ADC is foreground calibrated to reduce the channel mismatch, the power of the interleaving spurs is substantially reduced as shown in Figure 7. Lastly, the spectral purity in Figure 7 can be further improved by randomizing the channel order as shown in Figure 8. It can be seen in Figure 8 that, after randomization, only regular harmonic distortion is left on the resulting spectrum. Time interleaving is a powerful technique to increase the bandwidth of data converters.
Recent advances in mismatch compensation as well as cancellation of residual spurious content via randomization techniques have allowed the fully integrated realization of very high speed , , and bit interleaved ADCs.
Interleaving ADCs: Unraveling the Mysteries | Analog Devices
In the case in which the input signal is band limited, such as, for example, in a number of communication applications, a ping pong two-way interleaving approach allows allocating the undesired interleaving spurs away from the input band of interest via frequency planning. The spurious content can then be digitally filtered. While this approach consumes roughly twice the power compared to a noninterleaved ADC at half the IL sample rate required to capture the same spurious-free input bandwidth, on the other hand it both increases the dynamic range by 3 dB via processing gain and it also relaxes the roll-off of the antialiasing and roofing filters that precede the ADC thanks to the higher IL sample rate.
When the full input band of the IL converter is required to capture a wideband input signal, a higher order interleaving converter is appropriate. In this case, calibration and random shuffling allow interleaving distortion and spurious content compensation and cancellation. In that case, the two channels are equally scaled up, so the two data streams are recombined into a single DOUT data stream without alternating amplitude or modulation and no gain spur is introduced.
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